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AD9981/PCB 데이터시트(PDF) 43 Page - Analog Devices |
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AD9981/PCB 데이터시트(HTML) 43 Page - Analog Devices |
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43 / 44 page ![]() AD9981 Rev. 0 | Page 43 of 44 Adding a series resistor of value 50 Ω to 200 Ω can suppress reflections, reduce EMI, and reduce the current spikes inside of the AD9981. If series resistors are used, place them as close to the AD9981 pins as possible, (although try not to add vias or extra length to the output trace to get the resistors closer). If possible, limit the capacitance that each digital output drives to less than 10 pF. This is easily accomplished by keeping traces short and by connecting the outputs to only one device. Loading the outputs with excessive capacitance increases the current transients inside of the AD9981 and creates more digital noise on its power supplies. Digital Inputs Digital inputs on the AD9981 (HSYNC0, HSYNC1, VSYNC0, VSYNC1, SOGIN0, SOGIN1, SDA, SCL and CLAMP) were designed to work with 3.3 V signals, but are tolerant of 5.0 V signals. Therefore, no extra components need to be added if using 5.0 V logic. Any noise that gets onto the Hsync input trace adds jitter to the system. Therefore, minimize the trace length and do not run any digital or other high frequency traces near it. REFERENCE Bypass The AD9981 has three reference voltages that must be bypassed for proper operation of the input PGA. REFLO and REFHI are connected to each other through a 10 µF capacitor. REFCM is connected to ground through a 10 µF capacitor. These refer- ences are used by the input PGA circuitry to assure the greatest stability. Place them as close to the AD9981 pin as possible. Make the ground connection as short as possible. |
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