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LPC804 데이터시트(PDF) 6 Page - NXP Semiconductors |
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LPC804 데이터시트(HTML) 6 Page - NXP Semiconductors |
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6 / 89 page ![]() LPC804 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2023. All rights reserved. Product data sheet Rev. 2.1 — 25 July 2023 6 of 87 NXP Semiconductors LPC804 32-bit Arm Cortex-M0+ microcontroller The LPC804 TSSOP20 packages have the following top-side marking: • First line: LPC804 • Second line: M101 • Third line: xxxx • Fourth line: xxywwx[R] – yww: Date code with y = year and ww = week. – xR = Boot code version and device revision. The LPC804 TSSOP24 packages have the following top-side marking: • First line: LPC804 • Second line: xxxx • Third line: ywwx[R] – yww: Date code with y = year and ww = week. – xR = Boot code version and device revision. • Fourth line: M1y1J – y: 0 or 1 The LPC804 WLCSP20 packages have the following top-side marking: • First line: LPC804 • Second line: xxxxx • Third line: xyywwx[R] – yyww: Date code with ww = week and yy = year. – xR = Boot code version and device revision. • Fourth line: xxx - yyy Table 3. Device revision table Revision identifier (R) Revision description 1A Initial device revision with Boot ROM version 13.1 1B Initial device revision with Boot ROM version 13.1 1C Initial device revision with Boot ROM version 13.1 |
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