Nexperia

74HC161

Presettable synchronous 4-bit binary counter; asynchronous reset

mna909

CP

PE

TC

MR

inhibit

count

CEP

CET

D0

D2

D1

D3

Q0

Q2

Q1

Q3

reset

preset

12

13

14

15

0

1

2

Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero,

one and two; inhibit.

Fig. 8. Typical timing sequence

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

-0.5

+7.0

V

IIK

input clamping current

VI < -0.5 V or VI > VCC + 0.5 V

-

±20

mA

IOK

output clamping current

VO < -0.5 V or VO > VCC + 0.5 V

-

±20

mA

IO

output current

VO = -0.5 V to VCC + 0.5 V

-

±25

mA

ICC

supply current

-

50

mA

IGND

ground current

-50

-

mA

Tstg

storage temperature

-65

+150

°C

Ptot

total power dissipation

[1]

-

500

mW

[1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.

For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.

74HC161

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 5 — 16 March 2021

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