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L6730C 데이터시트(PDF) 33 Page - STMicroelectronics |
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L6730C 데이터시트(HTML) 33 Page - STMicroelectronics |
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33 / 50 page ![]() L6730C - L6730D Application details 33/50 ● Compensation network design: – Put the gain R5/R3 in order to obtain the desired converter bandwidth – Place ωZ1 before the output filter resonance ωLC; – Place ωZ2 at the output filter resonance ωLC; – Place ωP1 at the output capacitor ESR zero ωESR; – Place ωP2 at one half of the switching frequency; – Check the loop gain considering the error amplifier open loop gain. Figure 27. Asymptotic bode plot of converter's open loop gain LC C Vosc Vin R R ϖ ϖ ⋅ ∆ ⋅ = 3 5 (18) |
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