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UPD17708 데이터시트(PDF) 38 Page - Renesas Technology Corp |
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UPD17708 데이터시트(HTML) 38 Page - Renesas Technology Corp |
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38 / 358 page ![]() µPD17704, 17705, 17707, 17708, 17709 36 Figure 4-1. Outline of Data Memory (2/3) (b) µPD17707, 17708 Note Port input/output selection registers are allocated to addresses 60H through 6FH of BANK 15. Cautions 1. The µPD17707 and 17708 do not have BANKs 10 through 14. 2. Nothing is allocated to addresses 00H through 5FH of BANK15. Peripheral hardware Data transfer Column address Data memory BANK0 Port registers Port registers Port registers Port registers BANK1 BANK2 BANK3 BANK4 BANK9 BANK15Note System registers Ports 0123456789 A B C D E F Data transfer 0 1 2 3 4 5 6 7 Data buffer |
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