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UPD17708 데이터시트(PDF) 118 Page - Renesas Technology Corp

부품명 UPD17708
상세설명  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 데이터시트(HTML) 118 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
116
11.4 General-Purpose Output Port (P1B)
11.4.1 Configuration of output port
The configuration of the output port is shown below.
(1) P1B (P1B3, P1B2, P1B1, P1B0)
11.4.2 Using output port
The output port outputs the contents of the output latch to each pin.
The output data is set by executing a write instruction (such as MOV) to the port register corresponding to
the port pin.
Write “1” to the port register to output a high level to the port pin; write “0” to output a low level.
However, because P1B is an N-ch open-drain output port, it is floated when it outputs a high level. Therefore,
an external pull-up resistor must be connected to this port.
If a read instruction (such as SKT) is executed to the port register, the contents of the output latch are read.
11.4.3 Status of output port at reset
(1) At power-ON reset
The contents of the output latch are output.
The contents of the output latch are reset to “0”.
(2) At WDT&SP reset
The contents of the output latch are output.
The contents of the output latch are reset to “0”.
(3) At CE reset
The contents of the output latch are output.
The contents of the output latch are retained.
(4) On execution of clock stop instruction
The contents of the output latch are output.
The contents of the output latch are retained.
(5) In halt status
The contents of the output latch are output.
The contents of the output latch are retained.
Output
latch
Read instruction
Port register
(1 bit)
Write instruction



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