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UPD17708 데이터시트(PDF) 202 Page - Renesas Technology Corp |
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UPD17708 데이터시트(HTML) 202 Page - Renesas Technology Corp |
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202 / 358 page ![]() µPD17704, 17705, 17707, 17708, 17709 200 14.5 Using A/D Converter 14.5.1 Software mode The software mode is convenient for comparing one compare voltage. An example of a program in this mode is shown below. Example To compare input voltage VADCIN of AD0 pin with compare voltage VADCREF (127.5/256 VDD), and branch to AAA if VADCIN < VADCREF, or to BBB if VADCIN > VADCREF ADCR7 FLG 0.0EH.3 ; Defines each bit of DBF as ADCR data setting flag ADCR6 FLG 0.0EH.2 ADCR5 FLG 0.0EH.1 ADCR4 FLG 0.0EH.0 ADCR3 FLG 0.0EH.3 ADCR2 FLG 0.0EH.2 ADCR1 FLG 0.0EH.1 ADCR0 FLG 0.0EH.0 BANK15 INITFLG NOT P0DPLD3, NOT P0DPLD2, NOT P0DPLD1, P0DPLD0 ; Disconnects pull-down resistor of P0D0 pin BANK0 INITFLG NOT ADCCH2, NOT ADCCH1, ADCCH0 ; Selects AD0 pin for A/D converter CLR1 ADCMD ; Sets software mode INITFLG ADCR7, NOT ADCR6, NOT ADCR5, NOT ADCR4 ; INITFLG NOT ADCR3, NOT ADCR2, NOT ADCR1, NOT ADCR0 ; PUT ADCR, DBF ; Sets compare voltage VADCREF NOP ; Waits for duration of three instructions NOP ; NOP ; SKT1 ADCCMP ; Judges result of comparison BR AAA BR BBB 14.5.2 Hardware mode Here is a program example: Example To detect the value of analog input roltage VADCIN of AD0 pin. BANK15 INITFLG NOT P0DPLD3, NOT P0DPLD2, NOT P0DPLD1, P0DPLD0 ; Disconnects pull-down resistor of P0D0 pin BANK0 INITFLG NOT ADCCH2, NOT ADCCH1, ADCCH0 ; Selects AD0 pin for A/D converter SET1 ADCMD ; Sets hardware mode and starts conversion LOOP: SKT1 ADCSTT ; Detects end of A/D conversion ; Embedded macro instruction ;PEEK WR, .MF. ADCSTT SHR4 AND 0FH ;SKT1 WR,#.DF.ADCSTT AND 0FH BR LOOP ; Conversion in progress GET DBF,ADCR ; Stores result of conversion to DBF |
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