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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD17708 데이터시트(PDF) 265 Page - Renesas Technology Corp |
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UPD17708 데이터시트(HTML) 265 Page - Renesas Technology Corp |
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265 / 358 page  263 µPD17704, 17705, 17707, 17708, 17709 17.4.2 Function of phase comparator As shown in Figure 17-7, the phase comparator compares the phases of the divided frequency “fN” output by the programmable divider and the reference frequency “fr”, and outputs an up or down request signal. If the divided frequency fN is lower than reference frequency fr, the up request signal is output. If fN is higher than fr, the down request signal is output. Figure 17-8 shows the relationship between reference frequency fr, divided frequency fN, up request signal, and down request signal. When the PLL frequency synthesizer is disabled, neither the up request nor the down request signal is output. The up and down request signals are input to the charge pump and unlock FF, respectively. Figure 17-8. Relationship between fr, fN, UP, and DW (a) If fN lags behind fr (b) If fN leads fr (c) If fN and fr are in phase (d) If fN is lower than fr fr fN UP DW fr fN UP DW fr fN UP DW fr fN UP DW |
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