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WM8216SEFL/R 데이터시트(PDF) 11 Page - Wolfson Microelectronics plc |
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WM8216SEFL/R 데이터시트(HTML) 11 Page - Wolfson Microelectronics plc |
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11 / 27 page ![]() WM8216 Production Data w PD Rev 4.0 March 2007 11 The powers supplies can be brought up in any order but is important that either AVDD is brought up before DVDD or vice versa as shown in Figure 5 and Figure 6. Figure 5 Typical Power up Sequence where AVDD is Powered before DVDD1 Figure 5 shows a typical power-up sequence where AVDD comes up first. When AVDD goes above the minimum threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in reset. In this condition, all writes to the control interface are ignored. Now AVDD is at full supply level. Next DVDD1 rises to Vpord_on and PORB is released high and all registers are in their default state and writes to the control interface may take place. Note: It is recommended that every time power is cycled to the WM8216 a software reset is written to the software register to ensure that the contents of the control registers are at their default values before carrying out any other register writes. On power down, where AVDD falls first, PORB is asserted low whenever AVDD drops below the minimum threshold Vpora_off. Figure 6 Typical Power up Sequence where DVDD1 is Powered before AVDD Figure 6 shows a typical power-up sequence where DVDD1 comes up first. First it is assumed that DVDD1 is already up to specified operating voltage. When AVDD goes above the minimum threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in reset. In this condition, all writes to the control interface are ignored. When AVDD rises to Vpora_on, PORB is released high and all registers are in their default state and writes to the control interface may take place. |
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