Production Data

WM8569

w

PD Rev 4.0 June 2006

29

DAC DIGITAL VOLUME CONTROL

The DAC volume may also be adjusted in the digital domain using independent digital attenuation

control registers

REGISTER

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

7:0

LDA[7:0]

11111111

(0dB)

Digital Attenuation data for Left channel DACL in 0.5dB steps. See

Table 10

0000000

Digital

Attenuation

DACL

8

UPDATE

Not latched

Controls simultaneous update of all Attenuation Latches

0: Store LDA in intermediate latch (no change to output)

1: Store LDA and update attenuation on all channels

7:0

RDA[6:0]

11111111

(0dB)

Digital Attenuation data for Right channel DACR in 0.5dB steps. See

Table 10

0000001

Digital

Attenuation

DACR

8

UPDATE

Not latched

Controls simultaneous update of all Attenuation Latches

0: Store RDA in intermediate latch (no change to output)

1: Store RDA and update attenuation on all channels.

7:0

MASTDA

[7:0]

11111111

(0dB)

Digital Attenuation data for all DAC channels in 0.5dB steps. See

Table 10

0001000

Master

Digital

Attenuation

(all channels)

8

UPDATE

Not latched

Controls simultaneous update of all Attenuation Latches

0: Store gain in intermediate latch (no change to output)

1: Store gain and update attenuation on all channels.

L/RDAX[7:0]

ATTENUATION LEVEL

00(hex)

-

∞ dB (mute)

01(hex)

-127dB

:

:

:

:

:

:

FE(hex)

-0.5dB

FF(hex)

0dB

Table 10 Digital Volume Control Attenuation Levels

SOFTWARE REGISTER RESET

Writing to register 11111 will cause a register reset, resetting all register bits to their default values.

The device will be held in this reset state until a subsequent register write to any address is

completed.