AT89LP4052-20PI datasheet(5/90 Pages) ATMEL

5 / 90 page

3547F–MICRO–6/06

AT89LP2052/LP4052

Figure 5-1.

Program Memory Map

5.2

Data Memory

The AT89LP2052/LP4052 contains 256 bytes of general SRAM data memory plus 128 bytes of

I/O memory. The lower 128 bytes of data memory may be accessed through both direct and

indirect addressing. The upper 128 bytes of data memory and the 128 bytes of I/O memory

share the same address space (see Figure 5-2). The upper 128 bytes of data memory may only

be accessed using indirect addressing. The I/O memory can only be accessed through direct

addressing and contains the Special Function Registers (SFRs). The lowest 32 bytes of data

memory are grouped into 4 banks of 8 registers each. The RS0 and RS1 bits (PSW.3 and

PSW.4) select which register bank is in use. Instructions using register addressing will only

access the currently specified bank. The AT89LP2052/LP4052 does not support external data

memory.

Figure 5-2.

Data Memory Map

Program Memory

AT89LP2052

0000

07FF

0000

0FFF

Program Memory

AT89LP4052

FFH

Upper

128

80H

7FH

Lower

128

Accessible

By Indirect

Addressing

Only

FFH

80H

Special

Function

Registers

Ports

Status and

Control Bits

Registers

Stack Pointer

Accumulator

(Etc.)

Timers

Accessible

By Direct and

Indirect

Addressing

Accessible

By Direct

Addressing

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