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AT83SND1CXXX-ROTIL 데이터시트(PDF) 195 Page - ATMEL Corporation

부품명 AT83SND1CXXX-ROTIL
상세설명  Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
PDF  212 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND1CXXX-ROTIL 데이터시트(HTML) 195 Page - ATMEL Corporation

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195
4109J–8051–10/06
AT8xC51SND1C
V
DD = 2.7 to 3.3 V, TA = -40 to +85°C
Notes:
1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-up resistor, this
must be < 1
μs.
3. Spikes on the SDA and SCL lines with a duration of less than 3·TCLCL will be filtered out. Maxi-
mum capacitance on bus-lines SDA and
SCL= 400 pF.
4. TCLCL= TOSC= one oscillator clock period.
22.4.1.2
Waveforms
Figure 22-17. Two Wire Waveforms
Symbol
Parameter
INPUT
Min
Max
OUTPUT
Min
Max
THD; STA
Start condition hold time
14·TCLCL
(4)
4.0
μs(1)
TLOW
SCL low time
16·TCLCL
(4)
4.7
μs(1)
THIGH
SCL high time
14·TCLCL
(4)
4.0
μs(1)
TRC
SCL rise time
1
μs-(2)
TFC
SCL fall time
0.3
μs0.3 μs(3)
TSU; DAT1
Data set-up time
250 ns
20·TCLCL
(4)- TRD
TSU; DAT2
SDA set-up time (before repeated START condition)
250 ns
1
μs(1)
TSU; DAT3
SDA set-up time (before STOP condition)
250 ns
8·TCLCL
(4)
THD; DAT
Data hold time
0 ns
8·TCLCL
(4) - TFC
TSU; STA
Repeated START set-up time
14·TCLCL
(4)
4.7
μs(1)
TSU; STO
STOP condition set-up time
14·TCLCL
(4)
4.0
μs(1)
TBUF
Bus free time
14·TCLCL
(4)
4.7
μs(1)
TRD
SDA rise time
1
μs
-
(2)
TFD
SDA fall time
0.3
μs0.3 μs(3)
Tsu;DAT1
Tsu;STA
Tsu;DAT2
Thd;STA
T
high
Tlow
SDA
(INPUT/OUTPUT)
0.3 VDD
0.7 V
DD
T
buf
T
su;STO
0.7 V
DD
0.3 V
DD
Trd
T
fd
T
rc
T
fc
SCL
(INPUT/OUTPUT)
T
hd;DAT
Tsu;DAT3
START or Repeated START condition
START condition
STOP condition
Repeated START condition



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