AT89C51CC02CA-RATUM datasheet(70/156 Pages) ATMEL

부품명	AT89C51CC02CA-RATUM

상세설명	Enhanced 8-bit Microcontroller with CAN Controller and Flash

PDF	156 Pages

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AT/T89C51CC02

4126J–CAN–05/06

Watchdog Programming

The three lower bits (S0, S1, S2) located into WDTPRG register permit to program the

WDT duration.

Table 50. Machine Cycle Count

To compute WD Timeout, the following formula is applied:

Note:

Svalue represents the decimal value of (S2 S1 S0)

Find Hereafter computed Timeout values for f

OSCXTAL = 12 MHz in X1 mode

Table 51. Timeout Computation

Machine Cycle Count

000

14 - 1

001

215 - 1

010

216 - 1

011

217 - 1

100

218 - 1

101

19 - 1

110

20 - 1

111

221 - 1

fOSC=12 MHz

fOSC=16MHz

fOSC=20 MHz

16.38 ms

12.28 ms

9.82 ms

32.77 ms

24.57 ms

19.66 ms

65.54 ms

49.14 ms

39.32 ms

131.07 ms

98.28 ms

78.64 ms

262.14 ms

196.56 ms

157.28 ms

524.29 ms

393.12 ms

314.56 ms

1.05 s

786.24 ms

629.12 ms

2.10 s

1.57 s

1.25 s

FTime Out

Fosc

WDX2 X2

∧

Svalue

()

-----------------------------------------------------------------------------

–

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