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BL702/704/706 데이터시트(PDF) 29 Page - Bouffalo Lab Intelligent Technology Co., Ltd. |
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BL702/704/706 데이터시트(HTML) 29 Page - Bouffalo Lab Intelligent Technology Co., Ltd. |
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29 / 47 page ![]() BL702/704/706 Datasheet Note: 1. All OCRAM in LP Mode can enter the retention state 2. MISC includes: DMA, EF, GLB, GPIO_MUX, GPIP, I2C, IRR, PWM, SEC, SPI, TMR, UART 3. BZ includes: BLE, zigbee 4. Because MISC includes GLB and GPIO_MUX, after this power domain is powered down, the functions configured through GLB register and GPIO register are all invalid BL702/704/706 Datasheet 29/ 47 @2021 Bouffalo Lab |
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