CC1010-RTY1 datasheet(109/152 Pages) TI

109 / 152 page

CC1010

SWRS047

Page 109 of 152

FREQ_0B (0xCD) - Frequency B, Control Register 0

Bit

Name

R/W

Reset value

Description

7:0

FREQ_B(7:0)

R/W

0x4E

8 LSB of frequency control word B.

FSEP1 (0xEB) - Frequency Separation Control Register 1

Bit

Name

R/W

Reset value

Description

7:3

Reserved, read as 0

2:0

FSEP(10:8)

R/W

0x00

3 MSB of the frequency separation control word

FSEP

FSEP0 (0xEA) - Frequency Separation Control Register 0

Bit

Name

R/W

Reset value

Description

7:0

FSEP(7:0)

R/W

0x59

8 LSB of the frequency separation control word

FSEP

PLL (0xE3) - PLL Control Register

Bit

Name

R/W

Reset value

Description

7:3

REFDIV(4:0)

R/W

0x02

Reference divider setting. The main crystal oscillator

frequency is divided by

REFDIV to create the RF

reference frequency fref. Valid

REFDIV settings are 2

through 24, as described above.

ALARM_

DISABLE

R/W

Disable / Enable the generation of the

ALARM_H and

ALARM_L bits

0 : Alarm function enabled

1 : Alarm function disabled

ALARM_H

None

Status bit for tuning voltage out of range (too close to

VDD)

The PLL should be re-calibrated if this bit is set

ALARM_L

None

Status bit for tuning voltage out of range (too close to

GND)

The PLL should be re-calibrated if this bit is set

CC1010-RTY1 데이터시트(PDF) 109 Page - Texas Instruments

CC1010-RTY1 데이터시트(HTML) 109 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL