PCF8535 datasheet(21/52 Pages) PHILIPS

21 / 52 page

1999 Aug 24

Philips Semiconductors

Objective speciﬁcation

× 133 pixel matrix driver

PCF8535

7.15.2

OUTPUT ADDRESSING

The output addressing of the RAM is done automatically in accordance with the currently selected multiplex rate.

Normally the user would not need to make any alterations to the addressing. There are, however, circumstances

pertaining to various connectivity of the device on a glass that would benefit from some in-built functionality. Three modes

exist that enable the user to modify the output addressing, namely:

1. MY, mirror the Y axis. This mode effectively flips the display about the X axis, resulting in an upside down display.

The effect is observable immediately the bit is modified. This is useful if the device is to be mounted above the display

area instead of below.

2. Bottom Row Swap (BRS). This mode swaps the order of the rows on the bottom(1) edge of the chip. This is useful to

aide routing to the display when it is not possible to pass tracks under the device; a typical example would be in tape

carrier package. This mode is often used in conjunction with TRS.

3. Top Row Swap (TRS). As with BRS, but swaps the order of rows on the top(1) edge of the chip.

7.15.2.1

Mirror Y, MY

As described above, the Y axis is mirrored in the X axis.

(1) The top edge is deﬁned as the edge containing the user interface connections. The bottom edge is the opposing edge.

handbook, full pagewidth

MGS679

Y axis

R55

R56

R57

R58

R59

R60

R61

R62

R63

R64

MY = 0

MY = 1

Mirror

... icons ...

Fig.12 Mirror Y behaviour (Mux rate 1 : 65).

PCF8535 데이터시트(PDF) 21 Page - NXP Semiconductors