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PCF8576CU/12 데이터시트(PDF) 24 Page - NXP Semiconductors |
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PCF8576CU/12 데이터시트(HTML) 24 Page - NXP Semiconductors |
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24 / 44 page ![]() 1998 Jul 30 24 Philips Semiconductors Product specification Universal LCD driver for low multiplex rates PCF8576C Table 5 Definition of PCF8576C commands COMMAND OPCODE OPTIONS DESCRIPTION MODE SET C 1 0 LP E B M1 M0 Table 6 Defines LCD drive mode. Table 7 Defines LCD bias configuration. Table 8 Defines display status. The possibility to disable the display allows implementation of blinking under external control. Table 9 Defines power dissipation mode. LOAD DATA POINTER C 0 P5 P4 P3 P2 P1 P0 Table 10 Six bits of immediate data, bits P5 to P0, are transferred to the data pointer to define one of forty display RAM addresses. DEVICE SELECT C 1100 A2 A1 A0 Table 11 Three bits of immediate data, bits A0 to A3, are transferred to the subaddress counter to define one of eight hardware subaddresses. BANK SELECT C 11110 I O Table 12 Defines input bank selection (storage of arriving display data). Table 13 Defines output bank selection (retrieval of LCD display data). The BANK SELECT command has no effect in 1 : 3 and 1 : 4 multiplex drive modes. BLINK C 1110 A BF1 BF0 Table 14 Defines the blinking frequency. Table 15 Selects the blinking mode; normal operation with frequency set by BF1, BF0 or blinking by alternation of display RAM banks. Alternation blinking does not apply in 1 : 3 and 1 : 4 multiplex drive modes. Table 6 Mode set option 1 Table 7 Mode set option 2 LCD DRIVE MODE BITS DRIVE MODE BACKPLANE M1 M0 Static 1 BP 0 1 1 : 2 MUX (2 BP) 1 0 1 : 3 MUX (3 BP) 1 1 1 : 4 MUX (4 BP) 0 0 LCD BIAS BIT B 1 ⁄3bias 0 1 ⁄2bias 1 Table 8 Mode set option 3 Table 9 Mode set option 4 DISPLAY STATUS BIT E Disabled (blank) 0 Enabled 1 MODE BIT LP Normal mode 0 Power-saving mode 1 |
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