TMD3721 datasheet(27/89 Pages) OSRAM

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Page 26

Datasheet, Public

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[v3-00] 2023-May-26

TMD3721 − Register O ver view

IPTAT Register (Address 0x1A)

Figure 27:

IPTAT Register

Enable Register (Address 0x80)

Figure 28:

ENABLE Register

Preset each applicable registers and its bits as per required

operation before activating PON. After PON is set, it is required

to wait 100μs settling time and then enable AEN and /or PEN.

In order to modify register configurations during operation, it

is required to set AEN=PEN=PON=0 firstly to avoid any

unexpected behavior or corrupted ALS and proximity results.

Disabling PON resets the device state machine, but all the

set the PON bit and wait 100μs settling time, and then enable

AEN and /or PEN to re-activate the corresponding

functionalities.

Addr: 0x1A

IPTAT

Bit

Bit Name

Default

Access

Bit Description

7:5

Reserved

000

Reserved. Must be set to default value.

4:0

IPTAT

00111

The IPTAT value needs to be changed from its default

value to be “00011b” during device initialization.

Addr: 0x80

ENABLE

Bit

Bit Name

Default

Access

Bit Description

7PVSYNC_EN

This bit enables proximity integration synced with

VSYNC

AVSYNC_EN

This bit enables ALS integration synced with VSYNC

5TEN

This bit activates temperature measurement after every

proximity measurement.

4PWEN

This bit activates the proximity wait feature which is set

by the PWTIME register. Active high.

3AWEN

This bit activates the ALS wait feature which is set by the

AWTIME register. Active high.

PEN

This bit activates the proximity detection. Active high.

AEN

This bit actives the ALS function. Active high.

0PON

Power ON. This field activates the internal oscillator and

ADC channels. Active high.

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