S12SCIV2SLASHD datasheet(61/130 Pages) FREESCALE

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MC9S12H256 Device User Guide — V01.18

2.3.9 PB[7:0] / FP[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins

PB7-PB0 are general purpose input or output pins. They can be configured as frontplane segment driver

outputs FP7-FP0 of the LCD. In MCU expanded modes of operation, these pins are used for the

multiplexed external address and data bus.

2.3.10 PE7 / FP22 / XCLKS / NOACC — Port E I/O Pin 7

PE7 is a general purpose input or output pin. It can be configured as frontplane segment driver output FP22

of the LCD module. The XCLKS signal selects between an external clock or oscillator configuration

during reset.

The XCLKS input selects between an external clock or oscillator configuration. The state of this pin is

latched at the rising edge of RESET. If the input is a logic high the EXTAL pin is configured for an

external clock drive. If input is a logic low an oscillator circuit is configured on EXTAL and XTAL. Since

this pin is an input with a pull-down device during reset, if the pin is left floating, the default configuration

is an oscillator circuit on EXTAL and XTAL.

During MCU expanded modes of operation, the NOACC signal, when enabled, is used to indicate that the

current bus cycle is an unused or “free” cycle. This signal will assert when the CPU is not using the bus.

2.3.11 PE6 / MODB / IPIPE1 — Port E I/O Pin 6

PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.

The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the

instruction queue tracking signal IPIPE1. This pin is an input with a pull-down device which is only active

when RESET is low.

2.3.12 PE5 / MODA / IPIPE0 — Port E I/O Pin 5

PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.

The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the

instruction queue tracking signal IPIPE0. This pin is an input with a pull-down device which is only active

when RESET is low.

2.3.13 PE4 / ECLK — Port E I/O Pin 4

PE4 is a general purpose input or output pin. It can be configured to drive the internal bus clock ECLK.

ECLK can be used as a timing reference.

2.3.14 PE3 / FP21 / LSTRB / TAGLO — Port E I/O Pin 3

PE3 is a general purpose input or output pin. It can be configured as frontplane segment driver output FP21

of the LCD module. In MCU expanded modes of operation, LSTRB is used for the low-byte strobe

function to indicate the type of bus access and when instruction tagging is on, TAGLO is used to tag the

low half of the instruction word being read into the instruction queue.

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