S12SCIV2SLASHD datasheet(100/130 Pages) FREESCALE

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MC9S12H256 Device User Guide — V01.18

operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source

resistance is allowed.

A.2.2.2 Source Capacitance

When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due

to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input

voltage

≤ 1LSB, then the external filter capacitor, C

f ≥ 1024 * (CINS– CINN).

A.2.2.3 Current Injection

There are two cases to consider.

A current is injected into the channel being converted. The channel being stressed has conversion

values of $3FF ($FF in 8-bit mode) for analog inputs greater than VRH and $000 for values less than

VRL unless the current is higher than specified as disruptive condition.

Current is injected into pins in the neighborhood of the channel being converted. A portion of this

current is picked up by the channel (coupling ratio K), This additional current impacts the accuracy

of the conversion depending on the source resistance.

The additional input voltage error on the converted channel can be calculated as VERR =K*RS *

IINJ, with IINJ being the sum of the currents injected into the two pins adjacent to the converted

channel.

Table A-9 ATD Electrical Characteristics

Conditions are shown in Table A-4 unless otherwise noted

Num C

Rating

Symbol

Min

Typ

Max

Unit

C Max input Source Resistance

––1

Ω

Total Input Capacitance

Non Sampling

Sampling

CINN

CINS

C Disruptive Analog Input Current

INA

–2.5

2.5

C Coupling Ratio positive current injection

10–4

A/A

C Coupling Ratio negative current injection

10–2

A/A

Freescale Semiconductor, Inc.

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