RF112 datasheet(30/45 Pages) NXP

30 / 45 page

The observation receiver LOs are generated from synthesizers in the 2 to 4 GHz range

followed by WBPLLs. The dual observation receivers use a ratio between the synthesizer

and WBPLL of 3/2 or 3/4, while the HB only observation receiver uses a ratio of 5/2 to

minimize the frequency overlap of the two VCOs. There are no requirements on phase

coherence for the observation receivers.

The figure below shows the Graphical illustration of the frequency planning. Y-axis has

no relevance.

TRX:

fVCO =

19200.0 -

24000.0

MHz

RO1

HB RO1

HB RO2

LB RO1

fVCO/2

fVCO/4

fVCO/2

3VCO/2

5fVCO/2

7fVCO/2

9fVCO/2

2fVCO

3fVCO

4fVCO

5fVCO

fVCO

5fVCO/8

5fVCO/4

3fVCO/2

7fVCO/4

9fVCO/4

5fVCO/2

11fVCO/4

13fVCO/4

fVCO/2

2fVCO

fVCO

3fVCO/2

fVCO/4

3fVCO/8

fVCO/2

fVCO/8

2fVCO

3fVCO

5fVCO/2

fVCO

fVCO =

3200.0 -

4000.0

MHz

RO2

fVCO =

1960.0 -

2400.0

MHz

1000

3000

4000

5000

6000

Frequency (MHz)

7000

8000

9000

10000

11000

2000

3fVCO/4

Figure 17. Graphical illustration of the frequency planning. Y-axis has no relevance.

The synthesizer reference frequency, typically 160.0 MHz, is generated by multiplying

the crystal oscillator clock at 40 MHz by 4 using a DLL. The crystal oscillator can either

drive its own crystal or receive an external clock input - either as a sinusoidal signal or a

0.9 V CMOS signal.

The LVDS interface can be used to output a 160 MHz reference clock, to be used by

other chips, see below Figure 18 . To reset and configure the transceiver a 40 MHz clock

must be input through or generated by the crystal.

Electrical characteristics

RF112 Transceiver Data Sheet, Rev. 1 Draft B, 05/2024

NXP Semiconductors

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