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STPMIC25 데이터시트(PDF) 28 Page - STMicroelectronics

부품명 STPMIC25
상세설명  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25 데이터시트(HTML) 28 Page - STMicroelectronics

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Figure 4. LDO1 input supply mux
BUCK4IN
PGND4
VLX4
VOUT4
VDDIO
VIN
(VIN from 2.8V to 5.5V DC)
LDO1
LDO2
LDO1OUT
LDO2OUT
VOUT_LDO1
LDO12IN
VOUT_LDO2
(to Flash Memory
or system device)
(fixed 1.8V to
MPU VDDA18AON)
SUPPLY
MUX
christophe belet
ST Microelectronics
BUCK4
(SMPS)
4.2.3
LDO3's special features
The LDO3 is a multipurpose LDO with three operating modes:
•
Normal mode – LDO3 works as general purpose LDO as well as LDO2, 5, 6, 7, and 8.
•
Bypass mode – LDO3 operates as a power switch as well as LDO2, 5, 6, 7, and 8.
•
Sink-source mode – LDO3 can regulate the output voltage working in sink source mode. This mode is
dedicated to supply the termination of DDR3/DDR3L or DDR4 IC memories with fixed output voltage. If
LDO3 is used in this mode, LDO3IN must be powered from the output of BUCK6 (See Figure 6). The
output voltage is fixed and follows VOUT6/2 even during the BUCK6 ramp-up and ramp-down phases. The
overcurrent limitation works both during sink and source output current modes.
4.2.4
LDO4's special features
LDO4 has two power sources: VIN and VBUS (see Figure 1). The selection among these two power inputs is
automatic. In other words, no user intervention is needed. The internal circuit continuously monitors voltage levels
on these pins and selects the input source having the highest input voltage.
LDO4 can be dedicated to supply USB HS analog PHY power domain and USB Type-C power delivery PHY
applications.
The LDO4 output voltage is fixed at 3.3 V.
4.2.5
REFDDR's special features
Like LDO3, the VREFDDR (DDR reference voltage) is a sink-source LDO. It is dedicated to supply the reference
voltage (VREF) pin of lpDDR3, DDR3, DDR3L, lpDDR4 and DDR4 memories.
The VREFDDR output voltage is fixed at VOUT6/². The input of VREFDDR is internally connected to VOUT6.
In the case that BUCK6 is enabled/disabled when VREFDDR is enabled, the output of the VREFDDR follows the
BUCK6 startup/shutdown output voltage behavior, while maintaining VOUT6/².
STPMIC25
Power regulator descriptions
DS14278 - Rev 3
page 28/145



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