| 전자부품 데이터시트 검색엔진 |
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STPMIC25 데이터시트(PDF) 33 Page - STMicroelectronics |
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STPMIC25 데이터시트(HTML) 33 Page - STMicroelectronics |
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33 / 145 page ![]() Figure 8. Buck dynamic voltage scaling (DVS) OCP and Hiccup management: Each buck converter supports OCP and can operate in Hiccup mode. When the output load of the buck exceeds the IOUT max output current (related to inductor peak current limit threshold IBKLIM), the PWM pulse is immediately stopped, and the buck starts to decrease output voltage, limiting the output current. If the overcurrent lasts more than tOCPDB_BUCK: • An interrupt is generated (if the interrupt has been unmasked by software). • Default behavior: the buck is turned OFF for tHICCUP_DLY duration and then turned ON again. • Alternative behavior: the PMIC is turned OFF for tHICCUP_DLY duration and then turned ON again (or goes to FAIL_SAFE_LOCK state). See Section 5.4.9 for details on OCP & hiccup management. All buck converters have a programmable IOUT max current threshold. IOUT thresholds are programmed in the NVM_BUCKS_IOUT_SHR NVM register. Output discharge: when the buck is disabled, a configurable pull-down (PD) discharge is automatically enabled. The buck output voltage discharges in tSD_BKtime duration (with typical recommended BOM) so that the buck converter output voltage is low before disabling the next regulators in the next ranking slot. Four values are configurable by software at runtime: no pull-down, slow-PD, fast-PD and forced slow-PD by setting BUCKS_PD_CR1/2. Fast discharge output can be modified by software in fast-PD when the buck is disabled, or it can be disabled by software to make the buck converter output in high impedance when it is disabled. See Figure 9 which shows fast-PD and slow-PD behavior. Startup sequence: when a buck is enabled, a startup delay (tSU_BCK) occurs before the output voltage starts to rise, and is followed by a soft-start voltage ramp (tSS_BCK). See Figure 9 STPMIC25 Power regulator descriptions DS14278 - Rev 3 page 33/145 |
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