M65KA512AB datasheet(22/55 Pages) STMICROELECTRONICS

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M65KA512AB

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5.5

Extended Mode Register description

The Extended Mode Register is used to configure the low-power self-refresh operation of

the device (PASR, DS). It is used to select the area of the memory array refreshed during

Partial Array Self Refresh operations, and the driver strength.

It is loaded by issuing a Extended Mode Register Set command that programs A0 to A12

address bits. The values placed on the address lines are then latched into the Extended

Mode Register. BA0 and BA1 must be set to ‘0’ and ‘1’ respectively.

See Table 5: Extended mode Register definition, for more details.

5.5.1

Partial Array Self Refresh bits (EMR0-EMR2)

Bits EMR0 to EMR2 of the Extended Mode Register allow to configure the amount of

memory that will be refreshed during a Self Refresh operation (see Section 3.4: Self

Refresh). It can be set to:

●

All Banks (banks 0, 1, 2, and 3)

●

Two Banks (banks 0 and 1)

●

One Bank (bank 0).

It is important to note that the data stored in the banks or portion of banks which are not

refreshed, are lost. As an example, data stored in banks 1, 2 and 3 are lost when the PASR

is set to one bank (bank 0 refreshed).

5.5.2

Driver Strength bit (EMR5-EMR6)

Extended Mode Register bits, EMR5 and EMR6, can be used to select the driver strength of

data outputs. This value should be set according to the application requirements.

5.5.3

Automatic Temperature Compensated Self Refresh bits (EMR3-EMR4)

The M65KA512ABM65KA512ABhas a built-in temperature sensor that controls

automatically the internal self refresh rate.

M65KA512AB 데이터시트(PDF) 22 Page - STMicroelectronics