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STM32F101X6 데이터시트(PDF) 28 Page - STMicroelectronics

부품명 STM32F101X6
상세설명  Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32F101X6 데이터시트(HTML) 28 Page - STMicroelectronics

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Electrical characteristics
STM32F101xx
28/64
5.3.5
Supply current characteristics
The current consumption is measured as described in Figure 9: Current consumption
measurement scheme.
Maximum current consumption
The MCU is placed under the following conditions:
●
All I/O pins are in input mode with a static value at VDD or VSS (no load)
●
All peripherals are disabled except if it is explicitly mentioned
●
The Flash access time is adjusted to fHCLK frequency (0 wait state from 0 to 24 MHz, 1
wait state from 24 to 36 MHz)
The parameters given in Table 11 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 7.
Table 11.
Maximum current consumption in Run and Sleep modes (TA = 85 °C)
(1)
Symbol
Parameter
Conditions
FHCLK
Typ (2) Max(3)
Unit
IDD
Supply current in
Run mode
External clock with PLL, code running from
Flash, all peripherals enabled (see RCC register
description): fPCLK1= fHCLK/2, fPCLK2=fHCLK
36 MHz
22
TBD
mA
24 MHz
21
TBD
External clock, PLL stopped, code running from
Flash, all peripherals enabled (see RCC register
description): fPCLK1= fHCLK/2, fPCLK2=fHCLK
8 MHz
10
TBD
External clock with PLL, code running from RAM,
all peripherals enabled (see RCC register
description): fPCLK1= fHCLK/2, fPCLK2=fHCLK
36 MHz
13
18
24 MHz
11
15
External clock, PLL stopped, code running from
RAM, all peripherals enabled (see RCC register
description): fPCLK1= fHCLK/2, fPCLK2=fHCLK
8 MHz
4.5
TBD
Supply current in
Sleep mode
External clock with PLL, code running from RAM
or Flash, all peripherals enabled (see RCC
register description): fPCLK1= fHCLK/2,
fPCLK2=fHCLK
36 MHz
13
22
24 MHz
10
17
External clock, PLL stopped, code running from
RAM or Flash, all peripherals enabled (see RCC
register description): fPCLK1= fHCLK/2,
fPCLK2=fHCLK
8 MHz
3.5
TBD
1.
TBD stands for to be determined.
2.
Typical values are measured at TA = 25 °C, and VDD = 3.3 V.
3.
Data based on characterization results, tested in production at VDmax, fHCLK max. TAmax, and code executed from RAM.



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