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ST7LITE49M 데이터시트(PDF) 17 Page - STMicroelectronics

부품명 ST7LITE49M
상세설명  8-bit MCU with single voltage Flash memory data EEPROM, ADC, 8/12-bit timers, and I²C interface
PDF  188 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LITE49M 데이터시트(HTML) 17 Page - STMicroelectronics

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ST7LITE49M
Pin description
17/188
14
18
PB0/AIN0
I/O
CT
x
ei1
x
x
x
Port B0
AIN0
15
19
PB1/AIN1/CLKIN
I/O
CT
x
xxx
Port B1
AIN1/External
clock source
16
20
PB2/AIN2
I/O
CT
x
x
x
x
Port B2
AIN2
17
21
PB3/AIN3
I/O
CT
x
x
x
x
Port B3
AIN3
18
22
PB4/AIN4
I/O
CT
x
x
x
x
Port B4
AIN4
19
23
PB5/AIN5
I/O
CT
x
x
x
x
Port B5
AIN5
20
24
PB6/AIN6
I/O
CT
x
x
x
x
Port B6
AIN6
21
25
PB7/AIN7
I/O
CT
x
x
x
x
Port B7
AIN7
22
26
PC0/AIN8
I/O
CT
x
ei2
x
x
x
Port C0
AIN8
23
27
PC1/AIN9
I/O
CT
x
x
x
x
Port C1
AIN9
24
28
PC2/ICCDATA
I/O
CT
x
x
x
Port C2
ICCDATA
25
29
PC3/ICCCLK
I/O
CT
x
x
x
x
Port C3
ICCCLK
26
30
PC4/LTIC
I/O
CT
x
ei2
x
x
Port C4
LTIC
27
31
PC5
I/O
CT
xx
x
Port C5
28
32
PC6
I/O
CT
x
ei2
xx
Port C6
29
1
PC7/BREAK
I/O
CT
x
x
x
Port C7
BREAK
30
2
PA0 (HS)
I/O
CT
HS
x
ei0
x
x
Port A0 (HS)
31
3
PA1 (HS)/ATIC
I/O
CT
HS
x
x
x
Port A1 (HS)
ATIC
32
4
PA2 (HS)/ATPWM0
I/O
CT
HS
x
x
x
Port A2 (HS)
ATPWM0
1.
In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to VDD are not
implemented).
2.
It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground.
Table 2.
Device pin description
Pin
number
Pin name
Level
Port/control
Main
function
(after reset)
Alternate
function
Input
Output



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