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M25PX32-VMP6F 데이터시트(PDF) 5 Page - STMicroelectronics

부품명 M25PX32-VMP6F
상세설명  32-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface
PDF  63 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M25PX32-VMP6F 데이터시트(HTML) 5 Page - STMicroelectronics

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Figure 1.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2.
VFQFPN and SO8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3.
SO16 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4.
Bus Master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5.
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6.
Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 8.
Write Enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9.
Write Disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10.
Read Identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 27
Figure 11.
Read Status Register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . 29
Figure 12.
Write Status Register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 13.
Read Data Bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 32
Figure 14.
Read Data Bytes at higher speed (FAST_READ) instruction sequence
and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 15.
Dual Output Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 16.
Read Lock Register (RDLR) instruction sequence and data-out sequence . . . . . . . . . . . . 35
Figure 17.
Read OTP (ROTP) instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 18.
Page Program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 19.
Dual Input Fast Program (DIFP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 20.
Program OTP (POTP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 21.
How to permanently lock the 64 OTP bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 22.
Write to Lock Register (WRLR) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 23.
Subsector Erase (SSE) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 24.
Sector Erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 25.
Bulk Erase (BE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 26.
Deep Power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 27.
Release from Deep Power-down (RDP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 48
Figure 28.
Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 29.
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 30.
Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 31.
Write Protect Setup and Hold timing during WRSR when SRWD=1 . . . . . . . . . . . . . . . . . 56
Figure 32.
Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 33.
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 34.
VPPH timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 35.
VFQFPN8 (MLP8) 8-lead very thin fine pitch quad flat package no lead,
6 × 5 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 36.
SO8W 8 lead plastic small outline, 208 mils body width, package outline . . . . . . . . . . . . . 59
Figure 37.
SO16 wide - 16-lead plastic small outline, 300 mils body width, package outline . . . . . . . 60



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