| 전자부품 데이터시트 검색엔진 |
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PIC18F44J10-E/ML 데이터시트(PDF) 214 Page - Microchip Technology |
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PIC18F44J10-E/ML 데이터시트(HTML) 214 Page - Microchip Technology |
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214 / 358 page ![]() PIC18F45J10 FAMILY DS39682C-page 212 Preliminary © 2007 Microchip Technology Inc. The analog reference voltage is software selectable to either the device’s positive and negative supply voltage (VDD and VSS), or the voltage level on the RA3/AN3/ VREF+ and RA2/AN2/VREF-/CVREF pins. The A/D converter has a unique feature of being able to operate while the device is in Sleep mode. To oper- ate in Sleep, the A/D conversion clock must be derived from the A/D’s internal RC oscillator. The output of the sample and hold is the input into the converter, which generates the result via successive approximation. A device Reset forces all registers to their Reset state. This forces the A/D module to be turned off and any conversion in progress is aborted. Each port pin associated with the A/D converter can be configured as an analog input, or as a digital I/O. The ADRESH and ADRESL registers contain the result of the A/D conversion. When the A/D conversion is com- plete, the result is loaded into the ADRESH:ADRESL register pair, the GO/DONE bit (ADCON0 register) is cleared and A/D Interrupt Flag bit, ADIF, is set. The block diagram of the A/D module is shown in Figure 17-1. FIGURE 17-1: A/D BLOCK DIAGRAM (Input Voltage) VAIN VREF+ Reference Voltage VDD(2) VCFG1:VCFG0 CHS3:CHS0 AN7(1) AN6(1) AN5(1) AN4 AN3 AN2 AN1 AN0 0111 0110 0101 0100 0011 0010 0001 0000 10-Bit Converter VREF- VSS(2) A/D AN12 AN11 AN10 AN9 AN8 1100 1011 1010 1001 1000 Note 1: Channels AN5 through AN7 are not available in 28-pin devices. 2: I/O pins have diode protection to VDD and VSS. 0X 1X X 1 X 0 |
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