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PIC18F4685-I/SP 데이터시트(PDF) 129 Page - Microchip Technology

부품명 PIC18F4685-I/SP
상세설명  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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PIC18F4685-I/SP 데이터시트(HTML) 129 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 127
PIC18F2682/2685/4682/4685
9.5
RCON Register
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
REGISTER 9-13:
RCON: RESET CONTROL REGISTER
R/W-0
R/W-1(1)
U-0
R/W-1
R-1
R-1
R/W-0(2)
R/W-0
IPEN
SBOREN
—RI
TO
PD
POR
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
IPEN: Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
SBOREN: BOR Software Enable bit(1)
For details of bit operation, see Register 4-1.
bit 5
Unimplemented: Read as ‘0’
bit 4
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-1.
bit 3
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-1.
bit 2
PD: Power-Down Detection Flag bit
For details of bit operation, see Register 4-1.
bit 1
POR: Power-on Reset Status bit(2)
For details of bit operation, see Register 4-1.
bit 0
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
Note 1:
If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.
2:
The actual Reset value of POR is determined by the type of device Reset. See Register 4-1 for additional
information.



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