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PIC18F258-E/LSQTP 데이터시트(PDF) 320 Page - Microchip Technology |
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PIC18F258-E/LSQTP 데이터시트(HTML) 320 Page - Microchip Technology |
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320 / 402 page ![]() PIC18FXX8 DS41159E-page 318 © 2006 Microchip Technology Inc. SUBWFB Subtract W from f with Borrow Syntax: [ label ] SUBWFB f [,d [,a]] Operands: 0 ≤ f ≤ 255 d ∈ [0,1] a ∈ [0,1] Operation: (f) – (W) – (C) → dest Status Affected: N, OV, C, DC, Z Encoding: 0101 10da ffff ffff Description: Subtract W and the Carry flag (borrow) from register ‘f’ (2’s complement method). If ‘d’ is ‘0’, the result is stored in W. If ‘d’ is ‘1’, the result is stored back in register ‘f’ (default). If ‘a’ is ‘0’, the Access Bank will be selected, overriding the BSR value. If ‘a’ is ‘1’, then the bank will be selected as per the BSR value (default). Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ‘f’ Process Data Write to destination Example 1: SUBWFB REG, 1, 0 Before Instruction REG = 0x19 (0001 1001) W = 0x0D (0000 1101) C = 0x01 After Instruction REG = 0x0C (0000 1011) W = 0x0D (0000 1101) C = 0x01 Z = 0x00 N = 0x00 ; result is positive Example 2: SUBWFB REG, 0, 0 Before Instruction REG = 0x1B (0001 1011) W = 0x1A (0001 1010) C = 0x00 After Instruction REG = 0x1B (0001 1011) W = 0x00 C = 0x01 Z = 0x01 ; result is zero N = 0x00 Example 3: SUBWFB REG, 1, 0 Before Instruction REG = 0x03 (0000 0011) W = 0x0E (0000 1101) C = 0x01 After Instruction REG = 0xF5 (1111 0100) ; [2’s comp] W = 0x0E (0000 1101) C = 0x00 Z = 0x00 N = 0x01 ; result is negative SWAPF Swap f Syntax: [ label ] SWAPF f [,d [,a]] Operands: 0 ≤ f ≤ 255 d ∈ [0,1] a ∈ [0,1] Operation: (f<3:0>) → dest<7:4>, (f<7:4>) → dest<3:0> Status Affected: None Encoding: 0011 10da ffff ffff Description: The upper and lower nibbles of register ‘f’ are exchanged. If ‘d’ is ‘0’, the result is placed in W. If ‘d’ is ‘1’, the result is placed in register ‘f’ (default). If ‘a’ is ‘0’, the Access Bank will be selected, overriding the BSR value. If ‘a’ is ‘1’, then the bank will be selected as per the BSR value (default). Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ‘f’ Process Data Write to destination Example: SWAPF REG Before Instruction REG = 0x53 After Instruction REG = 0x35 |
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