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CS42448 데이터시트(PDF) 29 Page - Cirrus Logic

부품명 CS42448
상세설명  108 dB, 192 kHz 6-In, 8-Out CODEC
PDF  64 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42448 데이터시트(HTML) 29 Page - Cirrus Logic

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DS648F2
29
CS42448
4.3.5
Line-Level Outputs and Filtering
The CS42448 contains on-chip buffer amplifiers capable of producing line-level differential as well as sin-
gle-ended outputs on AOUT1-AOUT8. These amplifiers are biased to a quiescent DC level of approxi-
mately VQ.
The delta-sigma conversion process produces high-frequency noise beyond the audio passband, most of
which is removed by the on-chip analog filters. The remaining out-of-band noise can be attenuated using
an off-chip low-pass filter.
See “DAC Output Filter” on page 56 for recommended output filter. The active filter configuration accounts
for the normally differing AC loads on the AOUTx+ and AOUTx- differential output pins. Also shown is a
passive filter configuration which minimizes costs and the number of components.
Figure 13 shows the full-scale analog output levels. All outputs are internally biased to VQ, approximately
VA/2.
4.3.6
Digital Volume Control
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to
-127.5 dB attenuation with 0.5 dB resolution. See “AOUTX Volume Control (Addresses 08h- 0Fh)” on
page 49. Volume control changes are programmable to ramp in increments of 0.125 dB at the rate con-
trolled by the SZC[1:0] bits in the Digital Volume Control register. See “Transition Control (Address 06h)”
on page 47.
Each output can be independently muted via mute control bits in the register “DAC Channel Mute (Ad-
dress 07h)” on page 49. When enabled, each AOUTx_MUTE bit attenuates the corresponding DAC to its
maximum value (-127.5 dB). When the AOUTx_MUTE bit is disabled, the corresponding DAC returns to
the attenuation level set in the Volume Control register. The attenuation is ramped up and down at the
rate specified by the SZC[1:0] bits.
4.3.7
De-Emphasis Filter
The CS42448 includes on-chip digital de-emphasis optimized for a sample rate of 44.1 kHz. The filter re-
sponse is shown in Figure 14. The de-emphasis feature is included to accommodate audio recordings
that utilize 50/15
μs pre-emphasis equalization as a means of noise reduction.
AOUTx+
AOUTx-
Full-Scale Differential Output Level =
(AOUTx+) - (AOUTx-) = 6.5 VPP = 2.3 VRMS
4.125 V
2.5 V
0.875 V
5.0 V
4.125 V
2.5 V
0.875 V
VA
Figure 13. Full-Scale Output



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