STAC9752 datasheet(32/95 Pages) IDT

32 / 95 page

STAC9752/9753

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

IDT™

STAC9752/9753

REV 3.3 1206

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

Disable source of DAC samples in Controller

Set PR bit for DAC channel in Registers 26h, 2Ah, or 3Eh

When it wants to power up the channel, all it needs to do is:

Clear PR bit for DAC channel in Registers 26h, 2Ah, or 3Eh

Enable source of DAC samples in Controller

5.2.3.

Primary and Secondary CODEC Register Addressing

The 2-bit CODEC ID field in the LSBs of Output Slot 0 is an addition to the original AC-Link protocol

that enables an AC‘97 Digital Controller to independently access Primary and Secondary CODEC

registers.

For Primary CODEC access, the AC‘97 Digital Controller:

Sets the AC-Link Frame valid bit (Slot 0, bit 15)

Validates the tag bits for Slot 1 and 2 Command Address and Data (Slot 0, bits 14 and 13)

Sets a zero value (00) into the CODEC ID field (Slot 0, bits 1 and 0)

Transmits the desired Primary CODEC Command Address and Command Data in Slots 1 and 2

For Secondary CODEC access, the AC‘97 Digital Controller:

Sets the AC-Link Frame valid bit (Slot 0, bit 15)

Places a non-zero value (01, 10, or 11) into the CODEC ID field (Slot 0, bits 1 and 0)

Transmits the desired Secondary CODEC Command Address and Command Data in Slots 1

and 2

Secondary CODECs disregard the Command Address and Command Data (Slot 0, bits 14 and 13)

tag bits. In a sense the Secondary CODEC ID field functions as an alternative Valid Command

Address (for Secondary reads and writes) and Command Data (for Secondary writes) tag indicator.

Secondary CODECs must monitor the Frame Valid bit, and ignore the frame (regardless of the state

of the Secondary CODEC ID bits) if it is not valid. AC‘97 Digital Controllers should set the frame valid

bit for a frame with a Secondary register access, even if no other bits in the output tag slot except the

Secondary CODEC ID bits are set.

5.3.

AC-Link Output Frame (SDATA_OUT)

The AC-Link output frame data streams correspond to the multiplexed bundles of all digital output

data targeting AC‘97’s DAC inputs and control registers. As mentioned earlier, each AC-Link output

frame supports up to 12 20-bit outgoing data time slots. Slot 0 is a special reserved time slot contain-

ing 16-bits which are used for AC-Link protocol infrastructure.

Figure 15 illustrates the time slot based AC-Link protocol.

STAC9752 데이터시트(PDF) 32 Page - Integrated Device Technology