PM7366-PI datasheet(106/286 Pages) PMC

106 / 286 page

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PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

R/W

TBEN

Bit 14

Unused

Bit 13

Unused

Bit 12

R/W

Reserved[3]

Bit 11

R/W

Reserved[2]

Bit 10

R/W

TBSEL[2]

Bit 9

R/W

TBSEL[1]

Bit 8

R/W

TBSEL[0]

Bit 7

R/W

RBEN

Bit 6

Unused

Bit 5

Unused

Bit 4

R/W

Reserved[1]

Bit 3

R/W

Reserved[0]

Bit 2

R/W

RBSEL[2]

Bit 1

R/W

RBSEL[1]

Bit 0

R/W

RBSEL[0]

This register controls the bit error rate testing of the receive and transmit links.

Note

This register is not byte addressable. Writing to this register modifies all the bits in the register.

Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all

four byte enables are negated, no access is made to this register.

RBSEL[2:0]:

The receive bit error rates testing link select bits (RBSEL[2:0]) controls the source of data on

the RBD and RBCLK outputs when receive bit error rate testing is enabled (RBEN set high).

RBSEL[2:0] is a binary number that selects a receive link (RD[7:0]/RCLK[7:0]) to be the

source of data for RBD and RBCLK outputs. RBSEL[2:0] is ignored when RBEN is set low.

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