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PM7366-PI 데이터시트(PDF) 145 Page - PMC-Sierra, Inc |
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PM7366-PI 데이터시트(HTML) 145 Page - PMC-Sierra, Inc |
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145 / 286 page ![]() RELEASED PM7366 FREEDM-8 DATA SHEET PMC-1970930 ISSUE 4 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 132 LCACHE: The large buffer cache enable bit (LCACHE) enables caching of Large Buffer RPDRs. When LCACHE is set high, RPDRs are fetched from the RPDR Large Buffer Free Queue in groups of up to six. When LCACHE is set low, RPDRs are fetched one at a time. SCACHE: The small buffer cache enable bit (SCACHE) enables caching of Small Buffer RPDRs. When SCACHE is set high, RPDRs are fetched from the RPDR Small Buffer Free Queue in groups of up to six. When SCACHE is set low, RPDRs are fetched one at a time. RAWMAX[1:0]: The RAWMAX[1:0] field determines how ‘raw’ (i.e. non packet delimited) data is written to host memory. Raw data is written to buffers in host memory in the same manner as packet delimited data. Whenever RAWMAX[1:0] + 1 buffers have been filled, the resulting buffer chain is placed in the ready queue. RPQ_RDYN[2:0]: The RPQ_RDYN[2:0] field sets the number of receive packet descriptor references (RPDRs) that must be placed onto the RPDR ready queue before the RPDR ready interrupt (RPQRDYI) is asserted, as follows: Table 19 – RPQ_RDYN[2:0] settings RPQ_RDYN[2:0] No of RPDRs 000 1 001 4 010 6 011 8 100 16 101 32 110 Reserved 111 Reserved RPQ_LFN[1:0]: The RPQ_LFN[1:0] field sets the number of times that a block of RPDRs are read from the Large Buffer Free Queue to the RMACs internal cache before the RPDR Large Buffer Free Queue interrupt (RPQLFI) is asserted, as follows: |
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