UCS1002-3 datasheet(64/114 Pages) MICROCHIP

64 / 114 page

UCS1002-3

DS20006852A-page 64

 2023 Microchip Technology Inc. and its subsidiaries

10.8

IBUS_CHG Configuration Register

The IBUS_CHG Configuration register sets the

IBUS_CHG current value. If current greater than

IBUS_CHG is detected flowing out of VBUS, emulation is

successful. The bit weights are in mA, and the range is

from 9.76 mA to 156.16 mA.

The contents of this register are not retained in Sleep.

* The value at POR for ICHG bits is 0001.

10.9

TDET_CHARGE Configuration

The TDET_CHARGE Configuration register controls

the tDC_TEMP and tDET_CHARGE timing. The tDC_TEMP

timer is started whenever the temperature exceeds

TREG. This timer is meant to give the system time to

cool at the lower ILIM setting before changing ILIM

again. The tDET_CHARGE timer is started whenever the

VBUS voltage is discharged and the bypass switch is

reactivated. This timer is meant to be a time delay to

enable the VBUS capacitor to charge before detecting

an Attach Detection event.

If tDET_CHARGE time is increased greater than 800 ms,

larger bus capacitors can be accommodated;

however, with a portable device present and PWR_EN

disabled, a Removal Detection event and then another

Attach Detection event occurs.

The contents of this register are retained in Sleep.

Name

Bits Address

Cof

Default

IBUS_CHG

Configuration

1Eh

R/W

04h

U-x

R/W-1*

—

ICHG[3]

ICHG[2]

ICHG[1]

ICHG[0]

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-4

Unimplemented

bit 3-0

ICHG[3:0]

1 LSB = 9.76 mA

Name

Bits Address

Cof

Default

TDET_CHARGE

Configuration

1Fh

R/W

03h

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