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DSP56300 데이터시트(PDF) 28 Page - Freescale Semiconductor, Inc |
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DSP56300 데이터시트(HTML) 28 Page - Freescale Semiconductor, Inc |
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28 / 108 page ![]() 2-14 Viterbi Decoder Implementation The Viterbi Algorithm Algorithmic Enhancements Figure 2-9 Applying an Offset to Obtain Odd Symmetry in the Branch Metrics A second modification to the algorithm is the ability to use soft decisions. By this we mean that the input data need not be just a 0/1 decision on a receiver statistic. We can assign intermediate values to indicate the reliability of the decision. In this way, a 0.001 can be a very reliable 0, a .75 can be a moderately reliable one, and a .49 is just barely a zero. The Viterbi algorithm generalizes to handle soft decisions with no trouble; the additions for the metric updates simply have more bits. By using soft decisions, the ability of the decoder to correct errors is greatly improved. Note that from an implementation on our DSP view, this modification is almost invisible, as 16-bit or 24-bit arithmetic will be done regardless of the number of bits in the branch metrics. Of course, provisions to protect path metric values from overflow may have to change for some systems. 00100 10100 01000 01001 11 00/-1 11/1 Decoder input S1 S0 S2 S3 S4 1 D D2 D3 D4 D5 00100 10100 01000 01001 S1 S0 S2 S3 S4 1 D D2 D3 D4 D5 11/1 00/-1 After subtracting one from each branch metric, the updates can be be done by adding and subtracting 1. Similarly, the lower state update can be done by subtracting 1 first, then adding 1 for the lower branch. Same metric, but the add/sub order is reversed. 1 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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