전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

R2023K 데이터시트(PDF) 48 Page - RICOH electronics devices division

부품명 R2023K
상세설명  2-wire Serial Interface Real Time Clock IC
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RICOH [RICOH electronics devices division]
홈페이지  http://www.ricoh.com
Logo RICOH - RICOH electronics devices division

R2023K 데이터시트(HTML) 48 Page - RICOH electronics devices division

Back Button R2023K Datasheet HTML 42Page - RICOH electronics devices division R2023K Datasheet HTML 43Page - RICOH electronics devices division R2023K Datasheet HTML 44Page - RICOH electronics devices division R2023K Datasheet HTML 45Page - RICOH electronics devices division R2023K Datasheet HTML 46Page - RICOH electronics devices division R2023K Datasheet HTML 47Page - RICOH electronics devices division R2023K Datasheet HTML 48Page - RICOH electronics devices division R2023K Datasheet HTML 49Page - RICOH electronics devices division R2023K Datasheet HTML 50Page - RICOH electronics devices division  
Zoom Inzoom in Zoom Outzoom out
 48 / 50 page
background image
R2023K/T
48
• Reading Time and Calendar Data
(1) Ordinary Process of Reading Time and Calendar Data
Read from Time Counter
and Calendar Counter
*2)
Stop Condition
Start Condition
*1)
(2) Basic Process of Reading Time and Calendar Data with Periodic Interrupt Function
*2)
Other Interrupt
Processes
Set Periodic Interrupt
Cycle Selection Bits
CTFG=1?
Read from Time Counter
and Calendar Counter
Yes
No
Control Register 2
←(X1X1X011)
Generate Interrupt in CPU
*1)
*3)
*1) When reading to clock and calendar counters, do not insert
Stop Condition until all times from second to year have been
written to prevent error in writing time. (Detailed in "P.28 Data
Transmission under Special Condition".
*2) Take care so that process from Start Condition to Stop
Condition will be complete within 0.5sec.
(Detailed in "P.28
Data Transmission under Special Condition".
*1) This step is intended to select the level mode
as a waveform mode for the periodic interrupt
function.
*2) This step must be completed within 0.5
second.
*3) This step is intended to set the CTFG bit to 0
in the Control Register 2 to cancel an interrupt to
the CPU.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com