Internet Data Sheet

Rev. 1.0, 2006-12

3

11032006-VX0M-M6IH

HYS72T512341H[H/J/K]P-[3.7/5]-B

Registered DDR2 SDRAM Modules

1Overview

This chapter gives an overview of the 1.8 V 240-Pin Registered DDR2 SDRAM Modules product family and describes its main

characteristics.

1.1

Features

• 240-pin PC2–4200 and PC2–3200 DDR2 SDRAM

memory modules.

• Four rank 512M

×72 module organization, and 512M ×4

chip organization

• Registered DIMM Parity bit for address and control bus

• 4 GB module built with 512 Mbit DDR2 SDRAMs in SG-

A4FBGA-60 and PG-A4FBGA-60 chipsize packages.

• Standard Double-Data-Rate-Two Synchronous DRAMs

(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power

supply

• Programmable CAS Latencies (3, 4, 5),

Burst Length (4 & 8) and Burst Type

• Auto Refresh (CBR) and Self Refresh

• Programmable self refresh rate via EMRS2 setting

• Programmable partial array refresh via EMRS2 settings

• DCC enabling via EMRS2 setting

• All inputs and outputs SSTL_18 compatible

• Off-Chip Driver Impedance Adjustment (OCD) and On-Die

Termination (ODT)

• RDIMM Dimensions (nominal): 18,30 mm high, 133.35

mm wide

• All speed grades faster than DDR2–400 comply with

DDR2–400 timing specifications.

TABLE 1

Performance Table

1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined

in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,

lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.

Product Type Speed Code

–3.7

–5

Unit

Speed Grade

PC2–4200 4–4–4

PC2–3200 3–3–3

—

Max. Clock Frequency

@CL5

f

CK5

266

200

MHz

@CL4

f

CK4

266

200

MHz

@CL3

f

CK3

200

200

MHz

Min. RAS-CAS-Delay

t

RCD

15

15

ns

Min. Row Precharge Time

t

RP

15

15

ns

Min. Row Active Time

t

RAS

45

40

ns

Min. Row Cycle Time

t

RC

60

55

ns