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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC8280 데이터시트(PDF) 699 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 699 Page - Freescale Semiconductor, Inc |
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699 / 1386 page  Serial Communications Controllers (SCCs) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 20-19 Figure 20-11. CTS Lost in Synchronous Protocols Note that if GSMR_H[CTSS] = 1, CTS transitions must occur while the Tx clock is low. Reception delays are determined by CD as shown in Figure 20-12. If GSMR_H[CDS] is zero, CD is sampled on the rising Rx clock edge before data is received. If GSMR_H[CDS] is 1, CD transitions cause data to be immediately gated into the receiver. 1. GSMR_H[CTSS] = 0. CTSP=0 or no CTS lost can occur. TCLK TXD First Bit of Frame Data NOTE: CTS Sampled Low Here 1. GSMR_H[CTSS] = 1. CTSP=0 or no CTS lost can occur. TCLK First Bit of Frame Data NOTE: CTS Sampled High Here Data Forced High RTS Forced High Data Forced High RTS Forced High CTS Lost Signaled in Frame B CTS Lost Signaled in Frame B (Output) RTS (Output) CTS (Input) CTS (Input) RTS (Output) TXD (Output) |
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