MU9C8328 Ethernet Interface

Rev. 4a

4

PIN DESCRIPTIONS

Continued

/INT (Interrupt, Output, Three-state TTL)

/INT goes LOW to signal the processor that a frame has

been processed, and the results loaded into the Status

register. /INT returns HIGH when the Status register is read.

/RESET (Reset, Input, TTL)

When /RESET is taken LOW, all the internal state

machines are reset to their initial state. Any data stored in

the input address parser is cleared, and the Control, Status,

and Learn Op-Code registers are reset to their default

values. /RESET is synchronous and should be held LOW

for a minimum of two SYSCLK cycles. The user must set

the LANCAM Segment Control register after asserting

/RESET.

LANCAM INTERFACE

DQ(15–0) (CAM Data Bus, I/O, Three-state TTL)

The DQ(15–0) bus communicates 16-bit data or

instructions

between

the

MU9C8328

and

the

LANCAM. When no data is being transmitted by either,

the bus goes HIGH-Z. Internally pulled down with nominal

50K resistor.

/E (Chip Enable, Output, TTL)

The MU9C8328 takes /E LOW to initiate LANCAM

activity by registering the /W, /CM, /EC, and DQ(15–0)

signals into the LANCAM. /E is taken HIGH to register

returning data into the MU9C8328.

/W (Write Gate, Output, TTL)

The MU9C8328 outputs /W to control the direction of

data flow between the MU9C8328 and the LANCAM. If

/W is LOW at the falling edge of /E, the MU9C8328 is

outputting data to the DQ(15–0) bus for the LANCAM to

input. When /W is HIGH at the falling edge of /E, the

LANCAM outputs data to the DQ(15–0) bus for input to

the MU9C8328.

/CM (Data/Command Select, Output, TTL)

The MU9C8328 outputs /CM to control whether

the LANCAM interprets the DQ(15–0) bus as containing

command information or data. If both /CM and /W are

LOW at the falling edge of /E, the MU9C8328 is outputting

an instruction for the LANCAM to execute, or a value for

one of the LANCAM configuration registers. If /CM is

LOW while /W is HIGH, then the LANCAM will be

outputting data from one of its configuration registers to

the MU9C8328. If /CM is HIGH while /W is LOW, the

MU9C8328 is outputting data for the LANCAM to place

in its data registers or memory. If /CM is HIGH while /W

is HIGH, the LANCAM is outputting data from one of its

data registers or memory to the MU9C8328.

/EC (Enable Daisy Chain, Output, TTL)

The MU9C8328 takes /EC LOW to control a daisy chain

of LANCAMs by generating the /MF output from the

LANCAM in the case of a match between the contents of

its Comparand register and its memory. When /EC is LOW,

only the LANCAM containing the match will respond to

write cycles, or output read data. When /EC is HIGH, all

LANCAMs will respond to write cycles.

/MF (Match Flag, Input, TTL)

The LANCAM takes /MF LOW to indicate to the

MU9C8328 that a match was found in its memory with

the contents of its Comparand register. /MF returns HIGH

after the MU9C8328 takes /EC HIGH, or the match

condition is no longer valid. In a daisy chain of

LANCAMs, the /MF signal comes from the /MF output

of the last LANCAM in the string. Internally pulled down

with nominal 50K resistor.

/FF (Full Flag, Input, TTL)

The LANCAM takes /FF LOW to indicate to the

MU9C8328 that the LANCAM has no empty locations

remaining. /FF is taken HIGH when the LANCAM has

one or more locations still empty. In a daisy chain of

LANCAMs, the /FF signal comes from the /FF output pin

of the last LANCAM in the string. Internally pulled down

with nominal 50K resistor.

POWER AND GROUND

VCC, GND (Positive Power Supply, Ground)

The VCC pins must be connected externally to a power

source regulated to 5.0 ± 0.25 volts, and should be

adequately bypassed to the Ground pins through

both high and low frequency capacitors. The Ground pins

should all be connected to a common ground plane.

NTTESTOUT

Reserved - Do not connect.

NTEST_EN

Reserved - Tie low.