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TMPR4937 데이터시트(PDF) 102 Page - Toshiba Semiconductor |
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TMPR4937 데이터시트(HTML) 102 Page - Toshiba Semiconductor |
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102 / 552 page ![]() Chapter 7 External Bus Controller 7-2 7.2 Block Diagram Figure 7.2.1 Block Diagram of External Bus Controller Boot Options CE*[7:0] BWE*[3:0]/BE*[3:0] OE* G-Bus I/F G-Bus ACEHOLD CCFG.SYSSP Register Address Decoder Host I/F Timing Control Channel Control Register Address Decoder Channel Control Register Address Decoder CH0 CH7 Timing Control EBIF SWE* ACK*/READY ADDR[19:0] EBIF CONTROL ACE* DATA[31:0] BUSSPRT* External Bus Controller (EBUSC) CG SYSCLK IOW* CS[1:0]* IOR* |
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