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TMPR4937 데이터시트(PDF) 105 Page - Toshiba Semiconductor

부품명 TMPR4937
상세설명  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
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Chapter 7 External Bus Controller
7-5
7.3.3
Address Mapping
Each of the eight channels can use the Base Address field (EBCCRn.BA[35:20]) and the Channel
Size field (EBCCRn.CS[3:0]) of the External Bus Channel Control Register to map to any physical
address.
A channel is selected when the following equation becomes True.
paddr[35:20] & !Mask[35:20] == BA[35:20] & !Mask[35:20]
In the above equation, paddr represents the accessed physical address, Mask[35:20] represents the
address mask value selected from Table 7.3.2 from the Channel Size field value, the ampersand (&)
represents the AND operation, and the exclamation mark (!) represents the Logical NOT for each bit.
Operation is indeterminate when either multiple channels are selected simultaneously, or a channel is
selected simultaneously with the SDRAM Controller or PCI Controller.
Table 7.3.2 Address Mask
CS[3:0]
Channel Size
Address Mask[35:20]
0000
1 MB
0000_0000_0000_0000
0001
2 MB
0000_0000_0000_0001
0010
4 MB
0000_0000_0000_0011
0011
8 MB
0000_0000_0000_0111
0100
16 MB
0000_0000_0000_1111
0101
32 MB
0000_0000_0001_1111
0110
64 MB
0000_0000_0011_1111
0111
128 MB
0000_0000_0111_1111
1000
256 MB
0000_0000_1111_1111
1001
512 MB
0000_0001_1111_1111
1010
1 GB
0000_0011_1111_1111
1011
Reserved
Reserved
1100
Reserved
Reserved
1101
Reserved
Reserved
1110
Reserved
Reserved
1111
Reserved
Reserved



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