LSM6DSV320X datasheet(211/212 Pages) STMICROELECTRONICS

211 / 212 page

List of figures

Figure 1.

Four-stage pedometer algorithm ........................................................ 5

Figure 2.

Generic state machine............................................................... 6

Figure 3.

State machine in the LSM6DSV320X .................................................... 6

Figure 4.

Machine learning core in the LSM6DSV320X ............................................... 7

Figure 5.

Pin connections ................................................................... 9

Figure 6.

LSM6DSV320X connection modes ..................................................... 10

Figure 7.

SPI target timing in mode 0 .......................................................... 18

Figure 8.

SPI target timing in mode 3 .......................................................... 18

Figure 9.

I²C target timing diagram ............................................................ 19

Figure 10.

Read and write protocol (in mode 3) .................................................... 25

Figure 11.

SPI read protocol (in mode 3) ......................................................... 26

Figure 12.

Multiple byte SPI read protocol (2-byte example) (in mode 3) ................................... 26

Figure 13.

SPI write protocol (in mode 3)......................................................... 27

Figure 14.

Multiple byte SPI write protocol (2-byte example) (in mode 3) ................................... 27

Figure 15.

SPI read protocol in 3-wire mode (in mode 3) .............................................. 27

Figure 16.

Single-channel mode (XL_DualC_EN = 0) ................................................ 33

Figure 17.

High-g accelerometer filter ........................................................... 34

Figure 18.

Block diagram of filters ............................................................. 37

Figure 19.

Low-g accelerometer UI chain ........................................................ 38

Figure 20.

Low-g accelerometer composite filter.................................................... 38

Figure 21.

Accelerometer chain with mode 3 enabled ................................................ 39

Figure 22.

Gyroscope digital chain - mode 1 (UI/EIS) and mode 2 ....................................... 40

Figure 23.

Gyroscope digital chain - mode 3 (OIS) .................................................. 41

Figure 24.

LSM6DSV320X supports UI, enhanced EIS, and OIS processing simultaneously ..................... 42

Figure 25.

Gyroscope enhanced EIS and UI block diagram ............................................ 42

Figure 26.

Auxiliary interface full control ......................................................... 44

Figure 27.

OIS primary interface full control ....................................................... 45

Figure 28.

LSM6DSV320X electrical connections in mode 1 ........................................... 49

Figure 29.

LSM6DSV320X electrical connections in mode 2 ........................................... 50

Figure 30.

LSM6DSV320X electrical connections in mode 3 (auxiliary 3/4-wire SPI or auxiliary MIPI I3C) ............ 51

Figure 31.

Accelerometer block diagram ......................................................... 75

Figure 32.

LGA-14L 2.5 x 3.0 x 0.83 mm package outline and mechanical data ............................. 187

Figure 33.

Carrier tape information for LGA-14L package ............................................ 188

Figure 34.

LGA-14L package orientation in carrier tape .............................................. 188

Figure 35.

Reel information for carrier tape of LGA-14L package ....................................... 189

LSM6DSV320X

List of figures

DS14623 - Rev 1

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