LSM6DSV80X datasheet(114/181 Pages) STMICROELECTRONICS

114 / 181 page

11.26

SFLP_QUATZ_L (30h) and SFLP_QUATZ_H (31h)

SFLP game rotation vector Z value output register (R). The value is expressed as half-precision floating-point

format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits).

Table 251. SFLP_QUATZ_H and SFLP_QUATZ_L registers

D15

D14

D13

D12

D11

D10

Table 252. SFLP_QUATZ_H and SFLP_QUATZ_L register description

D[15:0]

SFLP game rotation vector Z value output value

11.27

SFLP_GBIASX_INIT_L (32h) and SFLP_GBIASX_INIT_H (33h)

SFLP gyroscope bias X-axis initialization register (R/W). The value is expressed as half-precision floating-point

format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits).

Table 253. SFLP_GBIASX_INIT_H and SFLP_GBIASX_INIT_L registers

D15

D14

D13

D12

D11

D10

Table 254. SFLP_GBIASX_INIT_H and SFLP_GBIASX_INIT_L register description

D[15:0]

SFLP gyroscope bias X-axis initial value

11.28

SFLP_GBIASY_INIT_L (34h) and SFLP_GBIASY_INIT_H (35h)

SFLP gyroscope bias Y-axis initialization register (R/W). The value is expressed as half-precision floating-point

format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits).

Table 255. SFLP_GBIASY_INIT_H and SFLP_GBIASY_INIT_L registers

D15

D14

D13

D12

D11

D10

Table 256. SFLP_GBIASY_INIT_H and SFLP_GBIASY_INIT_L register description

D[15:0]

SFLP gyroscope bias Y-axis initial value

LSM6DSV80X

Embedded functions register description

DS14764 - Rev 1

page 114/181

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