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ADF4382ABCCZ 데이터시트(PDF) 7 Page - Analog Devices |
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ADF4382ABCCZ 데이터시트(HTML) 7 Page - Analog Devices |
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7 / 82 page ![]() Data Sheet ADF4382A SPECIFICATIONS analog.com Rev. A | 7 of 82 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Normalized In-Band Phase Noise Floor5 Integer Mode LNORM-INT −239 dBc/Hz Fractional Mode LNORM-FRAC −237 dBc/Hz Normalized 1/f Phase Noise Floor5, 6 L1/f −287 dBc/Hz Normalized to 1 Hz Normalized 1/f Figure of Merit (FOM)6 L1/f_1G_10k Integer Mode L1/f_1G_10k INT −147 dBc/Hz Fractional Mode L1/f_1G_10k FRAC −143 dBc/Hz Integrated RMS Jitter Integration Bandwidth: 100 Hz to 100 MHz 20 fs RFOUT = 20 GHz ADC SNR Method 31 fs RFOUT = 20 GHz Spurious fREF <−95 dBc fPFD −90 dBc TEMPERATURE SENSOR (ANALOG-TO-DIGITAL CONVERTER (ADC)) ADC Clock Frequency fADC_CLK 400 kHz ADC clock divider output ADC Clock Divider Frequency fADC_CLKDIV 125 MHz ADC clock divider input Resolution 8 Bits 1 0.9 V < VCP < V5V_CP – 0.9 V. 2 Valid for 1.60 V ≤ VTUNE ≤ 2.85 V with part calibrated after a power cycle or software power-on reset. 3 Based on characterization. 4 VOD is the output differential voltage. 5 These values are modeled in ADIsimPLL. 6 Integrated ranged 1 kHz to fOUT. |
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