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S29GL01GS10DFIV13 데이터시트(PDF) 90 Page - Cypress Semiconductor |
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S29GL01GS10DFIV13 데이터시트(HTML) 90 Page - Cypress Semiconductor |
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90 / 108 page ![]() Document Number: 001-98285 Rev. *R Page 90 of 108 S29GL01GS/S29GL512S S29GL256S/S29GL128S 12. Physical Interface 12.1 56-pin TSOP 12.1.1 Connection Diagram Figure 12.1 56-pin Standard TSOP Notes: 1. Pin 28, Do Not Use (DNU), a device internal signal is connected to the package connector. The connector may be used by Cypress for test or other purposes and is not intended for connection to any host system signal. Do not use these connections for PCB Signal routing channels. Though not recommended, the ball can be connected to VCC or VSS through a series resistor. 2. Pin 27, 30, and 53 Reserved for Future Use (RFU). 3 18 4 1 2 5 6 7 8 9 10 19 20 21 22 23 24 11 12 13 14 15 16 17 46 45 48 47 44 43 42 40 41 54 53 55 56 52 51 50 49 39 38 37 36 35 34 33 32 31 30 56-Pin TSOP 25 26 27 28 29 A15 A18 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RESET# A21 WP# RY/BY# A17 A7 A6 A5 A23 A22 A4 A3 A2 A1 RFU DNU A24 A25 DQ10 A16 RFU VSS DQ15 DQ7 DQ14 DQ6 DQ2 DQ9 DQ1 DQ8 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ0 OE# VSS CE# A0 VIO RFU NC for GL256S, GL128S NC for GL512S, GL256S, GL128S NC for GL128S |
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