PCM1792DB.B datasheet(39/62 Pages) TI2

39 / 62 page

PCM1792

SLES069B − MARCH 2003 − REVISED NOVEMBER 2006

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Application for Interfacing With an External Digital Filter

For some applications, it may be desirable to use an external digital filter to perform the interpolation function, as it

can provide improved stop-band attenuation when compared to the internal digital filter of the PCM1792.

The PCM1792 supports several external digital filters, including:

D Texas Instruments DF1704 and DF1706

D Pacific Microsonics PMD200 HDCD filter/decoder IC

D Programmable digital signal processors

The external digital filter application mode is accessed by programming the following bits in the corresponding control

D DFTH = 1 (register 20)

The pins used to provide the serial interface for the external digital filter are shown in the connection diagram of

Figure 40. The word (WDCK) signal must be operated at 8

× or 4× the desired sampling frequency, fS.

System Clock (SCK) and Interface Timing

The PCM1792 in an application using an external digital filter requires the synchronization of WDCK and the system

clock. The system clock is phase-free with respect to WDCK. Interface timing among WDCK, BCK, DATAL, and

DATAR is shown in Figure 42.

Audio Format

The PCM1792 in the external digital filter interface mode supports right-justified audio formats including 16-bit, 20-bit,

and 24-bit audio data, as shown in Figure 41. The audio format is selected by the FMT[2:0] bits of control register

18.

MSB

LSB

BCK

DATA

1/4 fS or 1/8 fS

DATA

WDCK

Audio Data Word = 16-Bit

Audio Data Word = 20-Bit

Audio Data Word = 24-Bit

9 10 11 12 13 14 15

MSB

LSB

9 10 11 12 13 14 15

17 18 19

MSB

LSB

9 10 11 12 13 14 15

17 18 19

21 22 23

Figure 41. Audio Data Input Format for External Digital Filter (Internal DF Bypass Mode) Application

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