| 전자부품 데이터시트 검색엔진 |
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PM6680ATR 데이터시트(PDF) 38 Page - STMicroelectronics |
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PM6680ATR 데이터시트(HTML) 38 Page - STMicroelectronics |
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38 / 48 page ![]() Design guidelines PM6680A 38/48 Equation 30 where RTOT is the sum of the ESR of the output capacitor Rout and the equivalent ESR given by the virtual ESR network RESR. Moreover CINT must meet the following condition: Equation 31 Where k is a free design parameter greater than 3 and determines the minimum integrator capacitor value CINT: Equation 32 C must be selected as shown: Equation 33 R must be chosen in order to have enough ripple voltage on integrator input: Equation 34 R1 can be selected as follows: Equation 35 Example: OUT1=1.5 V, fSW = 290 kHz, L = 2.5 µH, Cout = 330 µF with Rout < 12 mΩ. We design RESR = 12 mΩ. We choose CINT = 1 nF by equations 30, 33 and Cfilt = 47 pF, RINT = 1 kΩ by eq.27, 28. C = 5.6 nF by Eq.34. Then R = 36 kΩ (eq.34) and R1 = 3 kΩ (eq.35). TOT out Z R C 2 1 f × × π = TOT out Z sw R C 2 k f k f × × π = × > OUT Z sw m INT V Vr f k f 2 g C × ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ − × π > INT C 5 C × > C R L R ESR × = Z Z f C 1 R f C 1 R 1 R × π × − ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ × π × × = |
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