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FN8808 데이터시트(PDF) 14 Page - Renesas Technology Corp

부품명 FN8808
상세설명  2-Phase Boost Controller with Integrated Drivers
PDF  44 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

FN8808 데이터시트(HTML) 14 Page - Renesas Technology Corp

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ISL78227
FN8808 Rev.6.02
Page 14 of 43
Feb 28, 2025
OUTPUT OVERVOLTAGE DETECTION/PROTECTION MONITOR THE FB PIN, (Refer to “Output Overvoltage Fault Protection” on page 34 for details)
FB Overvoltage Rising Trip Threshold
VFBOV_RISE
Percentage of VREF_1.6V
(Selectable Hiccup/Latch-off response)
118
120
122
%
FB Overvoltage Falling Recovery Threshold
VFBOV_FALL
Percentage of VREF_1.6V
(Selectable Hiccup/Latch-off response)
114
116
118
%
Overvoltage Threshold Hysteresis
4
%
FB Overvoltage Trip Delay
1
µs
OUTPUT UNDERVOLTAGE DETECTION (MONITOR THE FB PIN), (Refer to “Output Undervoltage Indication” on page 34 for details)
Undervoltage Falling Trip Threshold
VFBUVREF_FALL Percentage of VREF_1.6V
78
80
82
%
Undervoltage Rising Recovery Threshold
VFBUVREF_RISE Percentage of VREF_1.6V
82.5
84.0
86.5
%
Undervoltage Threshold Hysteresis
4
%
POWER-GOOD MONITOR (PGOOD PIN)
PGOOD Leakage Current
PGOOD HIGH, VPGOOD = 5V
1
µA
PGOOD Low Voltage
PGOOD LOW, IPGOOD = 0.5mA
0.06
0.40
V
PGOOD Rising Delay (DE Mode)
The PGOOD rising delay from
VSSPIN = VSSPCLAMP (3.47V) and
VREF_TRK ≥ 0.3V to PGOOD HIGH when DE
mode is selected (DE/PHDRP = VCC or
FLOAT)
0.5
ms
PGOOD Rising Delay (CCM Mode)
The PGOOD rising delay from
VSSPIN = VSSPCLAMP (3.47V) and
VREF_TRK ≥ 0.3V to PGOOD HIGH when
CCM mode is selected (DE/PHDRP = GND)
100
ms
PGOOD Falling Blanking Time
10
µs
HIC/LATCH, ATRK/DTRK PIN DIGITAL LOGIC INPUT
Input Leakage Current
EN <1V
-1
1
µA
Input Pull Down Current
EN >2V, pin voltage = 2.1V
0.7
1.0
2.0
µA
Logic Input Low
0.8
V
Logic Input High
2.1
V
DE/PHDRP PIN DIGITAL LOGIC INPUT (HIGH/LOW/FLOAT)
Input Leakage Current
-1
1
µA
Float Impedance - Pin to VCC
Pin = GND
100
200
300
kΩ
Float Impedance - Pin to GND
Pin = VCC
100
200
300
kΩ
Output Voltage on DE/PHDRP Pin
Pin = Float
2.1
2.6
2.7
V
Tri-State Input Voltage MAX
3
V
Tri-State Input Voltage MIN
1.8
V
Logic Input Low
Pin voltage falling
0.7
V
Logic Input High
Pin voltage rising
VCC - 0.4
V
TRACK PIN - DIGITAL INPUT LOGIC
Input Leakage Current
EN <1V, pin voltage = 5V, VCC = 0V
-1
1
µA
Input Pull-Up Current
EN >2V, pin voltage = 0V, VCC = 5V
0.8
1.1
1.5
µA
Electrical Specifications Refer to Figure 3 on page 7 and Typical Application Schematics (page 8). Operating conditions unless
otherwise noted: VIN = 12V, VPVCC = 5.2V and VVCC = 5.2V, TA = -40°C to +125°C (Note 7). Typical values are at TA = +25°C. Boldface limits apply across
the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6) UNIT



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