| 전자부품 데이터시트 검색엔진 |
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L9800 데이터시트(PDF) 18 Page - STMicroelectronics |
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L9800 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 55 page ![]() Figure 9. Scenario 5 power-up VBATT VDDIO tSLEEP2IDLE IDLE POR V3V3 V1V2 t V Scenario 5: power-up by VDDIO with VBATT present in sleep to idle transition. Both VBATT and VDDIO are applied in their operative range (6 V to 18 V and 3 V to 5.5 V respectively). IDLE is set to high and the POR signal is released after tSLEEP2IDLE. Figure 10. Scenario 6 power-up tSLEEP2LH=10μs+tON VBATT VDDIO IN0 POR V3V3 V1V2 V OUT2D t Scenario 6: power-up by VDDIO with VBATT present in sleep to limp-home transition. Both VBATT and VDDIO are applied in their operative range (6 V to 18 V and 3 V to 5.5 V respectively). IN0 (or IN1) is set to high; the POR signal is released after about 10 μs and DRAIN OUT2 reaches 90% of VBATT in tON time. L9800 Power supply DS14041 - Rev 2 page 18/55 |
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